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Analog chip design for next generation SciDVS
Analog chip design for next generation SciDVS
Last Update: 02.12.2024
Status: OPEN
Type: masters (short/long)
Contact: Rui Graça (rpgraca@ini.ethz.ch), Prof. Tobi Delbruck (tobi@ini.uzh.ch)
___________________________________________
Explore new ideas and design new analog blocks for the next SciDVS [1] tapeout. Some possible topics are:
Spatial computation in the focal plane
DVS bias adaptation
[1] R. Graca, S. Zhou, B. McReynolds and T. Delbruck, "SciDVS: A Scientific Event Camera with 1.7% Temporal Contrast Sensitivity at 0.7 lux," 2024 IEEE European Solid-State Electronics Research Conference (ESSERC), Bruges, Belgium, 2024, pp. 205-208, doi: 10.1109/ESSERC62670.2024.10719521.
Digital chip design for next generation SciDVS
Digital chip design for next generation SciDVS
Last Update: 02.12.2024
Status: OPEN
Type: masters (short/long)
Contact: Rui Graça (rpgraca@ini.ethz.ch), Prof. Tobi Delbruck (tobi@ini.uzh.ch)
___________________________________________
Explore new ideas and design new digital blocks for the next SciDVS [1] tapeout. Some possible topics are:
On-chip event processing
Improve control and communication with the SciDVS chip
Improve test structures
[1] R. Graca, S. Zhou, B. McReynolds and T. Delbruck, "SciDVS: A Scientific Event Camera with 1.7% Temporal Contrast Sensitivity at 0.7 lux," 2024 IEEE European Solid-State Electronics Research Conference (ESSERC), Bruges, Belgium, 2024, pp. 205-208, doi: 10.1109/ESSERC62670.2024.10719521.
Novel strategies for DVS noise filtering
Novel strategies for DVS noise filtering
Last Update: 02.12.2024
Status: OPEN
Type: masters (short/long)
Contact: Rui Graça (rpgraca@ini.ethz.ch), Prof. Tobi Delbruck (tobi@ini.uzh.ch)
___________________________________________
The DVS output is affected by spurious events caused by noise. Improve decoding strategies by recovering signal from a noisy event stream, exploiting spatial and temporal correlation in events.
Algorithms can be implemented in software and/or in hardware (FPGA).
Understanding DVS signal and noise
Understanding DVS signal and noise
Last Update: 02.12.2024
Status: OPEN
Type: masters (short/long)
Contact: Rui Graça (rpgraca@ini.ethz.ch), Prof. Tobi Delbruck (tobi@ini.uzh.ch)
___________________________________________
This project focuses on developing a mathematical theory relating DVS noise event rate to DVS cutoff frequency, event threshold and voltage noise, using stochastic signal theory.
The theory developed will be confronted with simulations of a simplified functional model of a DVS pixel, as well as with real data already acquired with a DVS camera.
Depending on the interest of the student, this project can go in a more theoretical oriented direction, in a modeling oriented direction, or even in a more hands-on approach with lab measurements of a DVS camera.
SciDVS applications
SciDVS applications
Last Update: 02.12.2024
Status: OPEN
Type: masters (short/long)
Contact: Rui Graça (rpgraca@ini.ethz.ch), Prof. Tobi Delbruck (tobi@ini.uzh.ch)
___________________________________________
Use our latest chip SciDVS [1] in real world scientific applications related to space observation and microscopy, such as neural activity imaging.
[1] R. Graca, S. Zhou, B. McReynolds and T. Delbruck, "SciDVS: A Scientific Event Camera with 1.7% Temporal Contrast Sensitivity at 0.7 lux," 2024 IEEE European Solid-State Electronics Research Conference (ESSERC), Bruges, Belgium, 2024, pp. 205-208, doi: 10.1109/ESSERC62670.2024.10719521.
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